LCTES 2020 is going virtual due to COVID-19 pandemic
LCTES decided not to have real-time Q&A Zoom/Slack communication. Instead, all LCTES talk videos are now available on SIGPLAN’s YouTube channel. Please click the YouTube Talk Videos tab to watch the videos.
This year’s LCTES program consists of one keynote presentation on “Compiler 2.0: Using Machine Learning to Modernize Compiler Technology” by Prof. Saman Amarasinghe, MIT, eleven full paper presentations, and five work-in-progress (WIP) paper presentations. Please check out the keynote video below.
Welcome to the 21st ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2020)
LCTES provides a link between the programming languages and embedded systems engineering communities. Researchers and developers in these areas are addressing many similar problems, but with different backgrounds and approaches. LCTES is intended to expose researchers and developers from either area to relevant work and interesting problems in the other area and provide a forum where they can interact.
YouTube Talk Videos
Please click the following link to YouTube to watch the talk video of each paper.
Session 1: Keynote
Using Machine Learning to Modernize Compiler Technology
Session 2: Performance
PAQSIM: Fast Performance Model for Graphics Workload on Mobile GPUs
A Collaborative Filtering Approach for the Automatic Tuning of Compiler Optimisations
ApproxRefresh: Enabling Uncorrectable Data Reuse on Flash Memory with Approximate Read Awareness
Compiling Spiking Neural Networks to Neuromorphic Hardware
Performance Optimization on big.LITTLE Architectures: A Memory-latency Aware Approach
Session 3: Reliability
Path Sensitive Signatures for Control Flow Error Detection
Exploiting the Trust Between Boundaries: Discovering Memory Corruptions in Printers via Driver Assisted Testing
Intermittent Computing with Peripherals, Formally Verified
Session 4: Predictability
CITTA: Cache Interference-aware Task Partitioning for Real-time Multi-core Systems
A Synergistic Approach to Predictable Compilation and Scheduling on Commodity Multi-Cores
Improving the Performance of WCET Analysis in the Presence of Variable Latencies
Session 5: Work-in-progress
A Synthesis-Aided Compiler for DSP Architectures
Towards Real-time CNN Inference from a Video Stream on a Mobile GPU
Beyond Base-2 Logarithmic Number Systems
Towards Building Better Mobile Web Browsers for Ad blocking: The Energy Perspective
FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling
Call for Papers
Embedded system design faces many challenges both with respect to functional requirements and nonfunctional requirements, many of which are conflicting. They are found in areas such as design and developer productivity, verification, validation, maintainability, and meeting performance goals and resource constraints. Novel design-time and run-time approaches are needed to meet the demand of emerging applications and to exploit new hardware paradigms, and in particular to scale up to multicores (including GPUs and FPGAs) and distributed systems built from multicores.
LCTES 2020 solicits papers presenting original work on programming languages, compilers, tools, theory, and architectures that help in overcoming these challenges. Research papers on innovative techniques are welcome, as well as experience papers on insights obtained by experimenting with real-world systems and applications.
- Full paper: 10 pages presenting original work.
- Work-in-progress paper: 4 pages papers presenting original ideas that are likely to trigger interesting discussions.
Accepted papers in both categories will appear in the proceedings published by ACM.
This year LCTES is introducing a journal mode in addition to the usual conference mode. All accepted full papers will be invited to be published in a special issue of ACM Transactions on Embedded Computing Systems (TECS).
Original contributions are solicited on the topics of interest including, but not limited to:
- Programming language challenges, including:
- Domain-specific languages
- Features to exploit multicore, reconfigurable, and other emerging architectures
- Features for distributed, adaptive, and real-time control embedded systems
- Language capabilities for specification, composition, and construction of embedded systems
- Language features and techniques to enhance reliability, verifiability, and security
- Virtual machines, concurrency, inter-processor synchronization, and memory management
- Compiler challenges, including:
- Interaction between embedded architectures, operating systems, and compilers
- Interpreters, binary translation, just-in-time compilation, and split compilation
- Support for enhanced programmer productivity
- Support for enhanced debugging, profiling, and exception/interrupt handling
- Optimization for low power/energy, code and data size, and best-effort and real-time performance
- Parameterized and structural compiler design space exploration and auto-tuning
- Tools for analysis, specification, design, and implementation, including:
- Hardware, system software, application software, and their interfaces
- Distributed real-time control, media players, and reconfigurable architectures
- System integration and testing
- Performance estimation, monitoring, and tuning
- Run-time system support for embedded systems
- Design space exploration tools
- Support for system security and system-level reliability
- Approaches for cross-layer system optimization
- Theory and foundations of embedded systems, including:
- Predictability of resource behavior: energy, space, time
- Validation and verification, in particular of concurrent and distributed systems
- Formal foundations of model-based design as the basis for code generation, analysis, and verification
- Mathematical foundations for embedded systems
- Models of computations for embedded applications
- Novel embedded architectures, including:
- Design and implementation of novel architectures
- Workload analysis and performance evaluation
- Architecture support for new language features, virtualization, compiler techniques, debugging tools
- Architectural features to improve power/energy, code/data size, and predictability
- Mobile systems and IoT, including:
- Operating systems for mobile and IoT devices
- Compiler and software tools for mobile and IoT systems
- Energy management for mobile and IoT devices
- Memory and IO techniques for mobile and IoT devices
- Empirical studies and their reproduction, and confirmation
Formatting Guidelines: Submissions must be in ACM SIGPLAN subformat of the acmart format by downloading acmart-sigplanproc.zip, double-column, 10-point type, and may not exceed 10 pages for full papers and 4 pages for work-in-progress papers (not including references; there is no page limit for references for both categories of papers.). A more detailed explanation about formatting can be found at http://www.sigplan.org/Resources/Author/. For papers in the work-in-progress categories, please prepend “WIP: **” in front of the title. To enable double-blind reviewing, submissions must adhere to two rules:
- author names and their affiliations must be omitted; and,
- references to related work by the authors should be in the third person (e.g., not “We build on our previous work …” but rather “We build on the work of …”).
However, nothing should be done in the name of anonymity that weakens the submission or makes the job of reviewing the paper more difficult (e.g., important background references should not be omitted or anonymized). Papers must describe unpublished work that is not currently submitted for publication elsewhere as discussed here. Authors of accepted papers will be required to sign an ACM copyright release.
The ACM template can be found at https://www.acm.org/publications/proceedings-template.
The submission site: is https://lctes20.hotcrp.com.
Please click here to register for LCTES’2020. Note that it is free to register.